This invention relates to an analog signal processor which is particularly adapted for use as a programmable cross-correlator or transversal filter that may be realized in an integrated metal-oxide-silicon (MOS) semiconductor structure.
The general area of discrete analog signal processing has been reviewed by Dennis D. Buss and Walter H. Bailey in a paper entitled: "Applications of Charge Transfer Devices to Analog Signal Processing" 1974 IEEE Inter-Con Technical Papers; Session 9, entitled: "CCDs in Analog Signal Processing," Paper 9/1. Among other circuits the authors discuss a typical transversal filter. In this realization the sampled analog signals are delayed, as for example, in a charge coupled device (CCD) delay line, and the variously delayed signals are multiplied by various tap weights and summed to achieve the filtering action. In the structure they describe, the delayed analog signals move relative to the structure, while the tap weights are applied at fixed points in the structure.
One realization of such a structure is described by Donald R. Lampe et al in a paper entitled: "An Electrically-Reprogrammable Analog Transversal Filter"; 1974 IEEE International Solid-State Circuits Conference; Session XIII, entitled: "Charge-Coupled Devices and Applications" Paper No. 13.6. In this structure, the analog tap weights are stored by combining the CCD process with the metal-nitride-oxide-silicon (MNOS) processes.
An alternative transversal filter realization is described by J.J. Tiemann et al in a paper entitled: "Intracell Charge-Transfer Structures for Signal Processing" IEEE Transactions on Electron Devices; Vol. ED-21, No. 5, May 1974 pp 300-308. In this structure the relative motion is of the tap weights moving past the stored analog signals, rather than the reverse as in the Lampe et al. structure. The analog signal is periodically sampled, and stored as charge in one of two surface potential wells. The charge is "sloshed" back and forth between the potential wells, being placed in one potential well to signify a binary tap weight 1 and in the other to signify a binary tap weight 0. The charges in the tap weight 1 potential wells are sensed by a floating electrode technique.
Because in the Tiemann et al. structure the magnitude of the surface charge is sensed, it suffers from a cross-modulation effect between signals when floating gate voltage sensing is used. In addition, the total capacitance to ground from the sensing electrode has a non-linearity caused by the depletion capacitance. With heavy capacitive loading, such cross-modulation and non-linearity effects may be suppressed by an external linear capacitance. However this reduces the output signal amplitude and hence the signal to noise ratio.